Journals 10 papers

  1. An Energy-Efficient Embedded Deep Neural Network Processor for High Speed Visual Attention in Mobile Vision Recognition SoC
    Solid-State Circuits, IEEE Journal of, vol.PP, no.99, pp.1-9, July. 2016.
    Seongwook Park, Injoon Hong, Junyoung Park, and Hoi-Jun Yoo.
  2. A 0.5 V 54 μW Ultra-Low-Power Object Matching Processor for Micro Air Vehicle Navigation
    Circuits and Systems I: Regular Papers, IEEE Transactions on, vol.63, no.3, pp.359-369, Mar. 2016.
    Youchang Kim, Injoon Hong, Junyoung Park, Hoi-Jun Yoo.
  3. An Energy-efficient and Scalable Deep Learning/Inference Processor With Tetra-Parallel MIMD Architecture for Big Data Applications
    Biomedical Circuits and Systems, IEEE Transactions on, vol.9, no.6, pp.838-848, Dec. 2015.
    Seongwook Park, Junyoung Park, Kyeongryeol Bong, Dongjoo Shin, Jinmook Lee, Sungpill Choi, Hoi-Jun Yoo.
  4. A Vocabulary Forest Object Matching Processor With 2.07 M-Vector/s Throughput and 13.3 nJ/Vector Per-Vector Energy for Full-HD 60 fps Video Object Recognition
    Solid-State Circuits, IEEE Journal of, vol.50, no.4, pp.1059-1069, Apr. 2015.
    Kyuho Jason Lee, Gyeonghoon Kim, Junyoung Park, Hoi-Jun Yoo.
  5. Intelligent Network-on-Chip With Online Reinforcement Learning for Portable HD Object Recognition Processor
    Circuits and Systems I: Regular Papers, IEEE Transactions on, vol.61, no.2, pp.476-484, Feb. 2014.
    Junyoung Park, Injoon Hong, Gyeonghoon Kim, Byeong-Gyu Nam, Hoi-Jun Yoo.
  6. A 320 mW 342 GOPS Real-Time Dynamic Object Recognition Processor for HD 720p Video Streams
    Solid-State Circuits, IEEE Journal of, vol.48, no.1, pp.33-45, Jan. 2013.
    Jinwook Oh, Gyeonghoon Kim, Junyoung Park, Injoon Hong, Seungjin Lee, Joo-Young Kim, Jeong-Ho Woo, Hoi-Jun Yoo.
  7. Low-Power, Real-Time Object-Recognition Processors for Mobile Vision Systems
    Micro, IEEE, vol.32, no.6, pp.38-50, Nov.-Dec. 2012.
    Jinwook Oh, Gyeonghoon Kim, Injoon Hong, Junyoung Park, Seungjin Lee, Joo-Young Kim, Jeong-Ho Woo, Hoi-Jun Yoo.
  8. A 92-mW Real-Time Traffic Sign Recognition System With Robust Illumination Adaptation and Support Vector Machine
    Solid-State Circuits, IEEE Journal of, vol.47, no.11, pp.2711-2723, Nov. 2012.
    Junyoung Park, Joonsoo Kwon, Jinwook Oh, Seungjin Lee, Joo-Young Kim, Hoi-Jun Yoo.
  9. A 345 mW Heterogeneous Many-Core Processor With an Intelligent Inference Engine for Robust Object Recognition
    Solid-State Circuits, IEEE Journal of, vol.46, no.1, pp.42-51, Jan. 2011.
    Seungjin Lee, Jinwook Oh, Junyoung Park, Joonsoo Kwon, Minsu Kim, Hoi-Jun Yoo.
  10. A 118.4 GB/s Multi-Casting Network-on-Chip With Hierarchical Star-Ring Combined Topology for Real-Time Object Recognition
    Solid-State Circuits, IEEE Journal of, vol.45, no.7, pp.1399-1409, July 2010.
    Joo-Young Kim, Junyoung Park, Seungjin Lee, Minsu Kim, Jinwook Oh, Hoi-Jun Yoo.

Conferences

  1. An energy-efficient parallel multi-core ADAS processor with robust visual attention and workload-prediction DVFS for real-time HD stereo stream
    2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX), Yokohama, 2016, pp. 1-3.
    K. Lee, K. Bong, C. Kim, Junyoung Park and H.-J. Yoo,
  2. A 126.1mW real-time natural UI/UX processor with embedded deep-learning core for low-power smart glasses
    2016 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, 2016, pp. 254-255.
    S. Park, S. Choi, J. Lee, M. Kim, Junyoung Park and H.-J. Yoo.
  3. A 1.9nJ/Pixel Deep Neural Network Processor for High Speed Visual Attention in a Mobile Vision Recognition SoC
    Solid-State Circuits Conference (A-SSCC), 2015 IEEE Asian, Xiamen, 2015, pp. 1-4.
    I. Hong, S. Park, Junyoung Park and H.-J. Yoo.
  4. Intelligent Task Scheduler with High Throughput NoC for Real-Time Mobile Object Recognition SoC
    European Solid-State Circuits Conference (ESSCIRC), ESSCIRC 2015 - 41st, Graz, 2015, pp. 100-103.
    K. Lee, Junyoung Park, I. Hong and H.-J. Yoo.
  5. A 1.5nJ/pixel super-resolution enhanced FAST corner detection processor for high accuracy AR
    European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th, Sept., 2014.
    S. Park, G. Kim, Junyoung Park, H.-J. Yoo.
  6. A Vocabulary Forest-based object matching processor with 2.07M-vec/s throughput and 13.3nJ/vector energy in full-HD resolution
    VLSI Circuits Digest of Technical Papers, 2014 Symposium on, June., 2014.
    K. Lee, G. Kim, Junyoung Park, H.-J. Yoo.
  7. A task-level pipelined many-SIMD augmented reality processor with congestion-aware network-on-chip scheduler
    COOL Chips XVII, 2014 IEEE, April., 2014.
    G. Kim, S. Park, K. Lee, Y. Kim, I. Hong, K. Bong, D. Shin, S. Choi, Junyoung Park, H.-J. Yoo.
  8. A high-throughput 16 #x00D7; super resolution processor for real-time object recognition SoC
    ESSCIRC (ESSCIRC), 2013 Proceedings of the, Sept., 2013.
    Junyoung Park, B.-G. Nam, H.-J. Yoo.
  9. A 125,582 vector/s throughput and 95.1% accuracy ANN searching processor with Neuro-Fuzzy Vision Cache for real-time object recognition
    VLSI Circuits (VLSIC), 2013 Symposium on, June., 2013.
    I. Hong, Junyoung Park, G. Kim, J. Oh, H.-J. Yoo.
  10. A 32.8mW 60fps cortical vision processor for spatio-temporal action recognition
    Circuits and Systems (ISCAS), 2013 IEEE International Symposium on, May., 2013.
    S. Park, Junyoung Park, I. Hong, H.-J. Yoo.
  11. A 34.1fps scale-space processor with two-dimensional cache for real-time object recognition
    Circuits and Systems (ISCAS), 2013 IEEE International Symposium on, May., 2013.
    Y. Kim, Junyoung Park, H.-J. Yoo.
  12. A multi-modal and tunable Radial-Basis-Funtion circuit with supply and temperature compensation
    Circuits and Systems (ISCAS), 2013 IEEE International Symposium on, May., 2013.
    K. Lee, Junyoung Park, G. Kim, I. Hong, H.-J. Yoo.
  13. A 646GOPS/W multi-classifier many-core processor with cortex-like architecture for super-resolution recognition
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International, Feb., 2013.
    Junyoung Park, I. Hong, G. Kim, Y. Kim, K. Lee, S. Park, K. Bong, H.-J. Yoo.
  14. A dynamic resource controller with network-on-chip for a 10.5nJ/pixel object recognition processor
    Solid State Circuits Conference (A-SSCC), 2012 IEEE Asian, Nov., 2012.
    J. Oh, I. Hong, G. Kim, Junyoung Park, H.-J. Yoo.
  15. Online Reinforcement Learning NoC for portable HD object recognition processor
    Custom Integrated Circuits Conference (CICC), 2012 IEEE, Sept., 2012.
    Junyoung Park, I. Hong, G. Kim, J. Oh, S. Lee, H.-J. Yoo.
  16. A simultaneous multithreading heterogeneous object recognition processor with machine learning based dynamic resource management
    Cool Chips XV (COOL Chips), 2012 IEEE, April., 2012.
    J. Oh, G. Kim, Junyoung Park, I. Hong, S. Lee, J.-Y. Kim, H.-J. Yoo.
  17. A 320mW 342GOPS real-time moving object recognition processor for HD 720p video streams
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International, Feb., 2012.
    J. Oh, G. Kim, Junyoung Park, I. Hong, S. Lee, H.-J. Yoo.
  18. A 92mW real-time traffic sign recognition system with robust light and dark adaptation
    Solid State Circuits Conference (A-SSCC), 2011 IEEE Asian, Nov., 2011.
    Junyoung Park, J. Kwon, J. Oh, S. Lee, H.-J. Yoo.
  19. A 57mW embedded mixed-mode neuro-fuzzy accelerator for intelligent multi-core processor
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International, Feb., 2011.
    J. Oh, Junyoung Park, G. Kim, S. Lee, H.-J. Yoo.
  20. A low-energy hybrid radix-4/-8 multiplier for portable multimedia applications
    Circuits and Systems (ISCAS), 2011 IEEE International Symposium on, May., 2011.
    G. Kim, S. Lee, Junyoung Park, H.-J. Yoo.
  21. A 30fps stereo matching processor based on belief propagation with disparity-parallel PE array architecture
    Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on, May., 2010.
    Junyoung Park, S. Lee, H.-J. Yoo.
  22. A 345mW heterogeneous many-core processor with an intelligent inference engine for robust object recognition
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, Feb., 2010.
    S. Lee, J. Oh, M. Kim, Junyoung Park, J. Kwon, H.-J. Yoo.
  23. A 1.2mW on-line learning mixed mode intelligent inference engine for robust object recognition
    VLSI Circuits (VLSIC), 2010 IEEE Symposium on, June., 2010.
    J. Oh, S. Lee, M. Kim, J. Kwon, Junyoung Park, J.-Y. Kim, H.-J. Yoo.
  24. Intelligent NoC with neuro-fuzzy bandwidth regulation for a 51 IP object recognition processor
    Custom Integrated Circuits Conference (CICC), 2010 IEEE, Sept., 2010.
    S. Lee, J. Oh, M. Kim, Junyoung Park, J. Kwon, M. Kim, H.-J. Yoo.
  25. A 92m W 76.8GOPS vector matching processor with parallel Huffman decoder and query re-ordering buffer for real-time object recognition
    Solid State Circuits Conference (A-SSCC), 2010 IEEE Asian, Nov., 2010.
    S. Lee, J. Kwon, J. Oh, Junyoung Park, H.-J. Yoo.